In the past, moving images were transmitted via analog signals, such as television signals. To improve signal to noise ratio and improve security, while also potentially providing additional signals over a given channel, moving images are digitized and transferred digitally. The size of a digital representation of moving images (i.e., video) is dependent on the resolution of the image. If a display device, such as a CRT, has a resolution of 1024.times.768 picture elements (pels or pixels), where each pixel can have an 8-bit color value, one image requires approximately 3/4 of a megabyte of memory. At a minimum, 30 images must be displayed per second, thereby requiring over 22 megabytes of memory per second. A typical 90-minute movie would thus require nearly 120 gigabytes of memory.
As a result of such need for memory to store a typical movie, digitized video is compressed using various digital compression techniques. One such technique for compressing video is the Digicypher II system by General Instruments. Such a system allows for compressed video and audio images to be transmitted over high bandwidth channels such as satellite transmission. Other known techniques for encoding/decoding video images include the Motion Picture Expert Group (MPEG) techniques MPEG 1 and MPEG 2. Current encoding/decoding standards for video telephony include the H.261 and H.263 standards.
Many of the compression/decompression standards employ the known discrete cosine transfer algorithm (DCT). The MPEG 1, MPEG 2, H.261 and H.263 standards are decompression protocols that describe how an encoded bit stream is to be decoded. As a result, the video can be encoded in any manner, as long as the resulting bit stream complies with the particular standard.
Once encoded, the images can be decoded and displayed on an electronic system dedicated to displaying video and audio, such as a television or digital video disk (DVD) player, or on electronic systems where displaying images are just one of the features of the system, such as a computer. A given electronic system must include an appropriate decoder to allow it to display digital sequences of images compressed under one of the above standards, assuming the original video was compressed using an encoder under that standard.
Current computers, such as personal computers, employ graphics or video accelerator cards that permit the computer to rapidly display static images. Personal computers are typically unable to decompress and display video images because the decompression or decoding routines typically require substantial processor overhead. For example, the MPEG 2 standard decodes 720 pixels per line and 576 lines per frame for a single image, and approximately 30 frames per second. As is known, each frame is divided into a series of 16 pixel by 16 pixel macroblocks, so that for each second, the processor must decode 48,600 macroblocks per second. Consequently, the time interval between decoding each macroblock is approximately 2.0576 microseconds. If a CPU in the PC is running at 100 megahertz, then only 2,057 clock cycles are available between decoding of each macroblock. This is an inadequate number of clock cycles to decode a given macroblock given the complexity of the decoding function under the MPEG 2 standard.
As a result, chip sets have been developed that employ a dedicated microcontroller, a MPEG 2 decompression chip, and a large amount (e.g., 2 megabytes) of memory, such as DRAM. Such chip sets can be expensive, particularly since they require 2 megabytes of DRAM. Thus, it would be desirable to employ the main memory of the computer, which typically has over 8 megabytes of DRAM.
Some applications exist that share the main memory. For example, the symmetrical multiprocessor environment (SMP) by Intel employs two or more identical processors that each access the same block of main memory. However, each of the microprocessors employs a memory management unit (MMU) that has an identical memory mapping table. Neither microprocessor can permanently allocate a portion of the main memory. Instead, as soon as one of the microprocessors no longer employs a portion of the memory, and the address of that memory is removed from its memory map, then the other microprocessor is free to use that portion of memory. Additionally, the SMP environment requires a specific operating system.
Another known method of sharing main memory is employed with graphics accelerators in personal computers. Previously, graphics or video accelerator cards included on-board memory chips. However, under the Video Electronics Standards Association (VESA), a VESA unified memory architecture (VUMA) standard has been developed. Under this standard, video accelerators can share main memory with the computer to thereby eliminate the need for on-board memory for the graphics accelerator. During boot-up of the computer system employing the video accelerator, the video accelerator will cause the basic input/output instructions (BIOS) of the computer to reserve a large portion of contiguous memory in the main memory, and prohibit the operating system or other applications from accessing or employing that memory.
However, typical operating systems such as Windows 95.RTM., manufactured by Microsoft Corporation, do not permit large blocks of memory to be permanently allocated for a given application or operation after booting up the computer. Instead, Windows 95 dynamically allocates memory to an application based on the need of that application. As soon as the application no longer uses the memory, Windows 95 allocates that memory to another application. Moreover, MPEG 2 decoding requires 2 megabytes of contiguous memory. Windows 95 allocates small blocks of memory (typically "pages" of 4 kilobytes each) that are scattered throughout the main memory.